Receiver Cascade Analysis
A receiver chain is a sequence of amplifiers, filters, and frequency converters from antenna to digital output. The system noise figure determines sensitivity, the gain distribution determines dynamic range, and the IP3 cascade determines linearity. These three analyses — Friis NF, gain chain, and cascaded IP3 — must be done together to optimise the receiver architecture.
The Three-Parameter Cascade
For each stage, you need three numbers: gain G (dB), noise figure NF (dB), and input-referred IP3 (IIP3, dBm). From these, the cascaded quantities are computed.
Friis Formula for Cascaded Noise Figure
where F = 10^(NF/10) (linear). The first stage dominates if G₁ is large. A low-NF, high-gain LNA first is critical.
Cascaded IIP3
(all in linear watts, not dBm). The last high-gain stage dominates linearity — opposite to noise figure.
Worked Example: 2.4 GHz Receiver
| Stage | G (dB) | NF (dB) | IIP3 (dBm) | Cumul. NF | Cumul. IIP3 |
|---|---|---|---|---|---|
| RF filter (insertion loss) | −2 | 2 | ∞ | 2.0 dB | — |
| LNA | +18 | 1.5 | +10 | 3.5 dB | +8.5 dBm |
| Image rejection filter | −2 | 2 | ∞ | 3.5 dB | +8.5 dBm |
| Mixer | −8 | 10 | +20 | 4.3 dB | +4.5 dBm |
| IF amplifier | +30 | 3 | +25 | 4.3 dB | −6.3 dBm |
The cumulative noise figure stabilises at 4.3 dB after the LNA — the LNA gain means all downstream stages add negligible noise. The IIP3 degrades to −6.3 dBm due to the high IF amplifier gain — if this is insufficient, the IF gain must be spread across more stages or reduced.
Minimum Detectable Signal
For the example above with 5 MHz bandwidth and 10 dB minimum SNR: MDS = −174 + 4.3 + 67 + 10 = −92.7 dBm.
Spurious-Free Dynamic Range
With IIP3 = −6.3 dBm and MDS = −92.7 dBm: SFDR = 2/3 × 86.4 = 57.6 dB. This means the receiver can handle a 57.6 dB range of input signal levels without the IM3 products exceeding the noise floor.
Gain Distribution Rules of Thumb
- Place the LNA as early as possible (after only necessary filtering) to establish noise figure.
- Total front-end gain before the ADC should be enough that ADC noise is irrelevant: typically 60–90 dB total gain for a −100 dBm sensitivity target into an ADC with −70 dBm full scale.
- Distribute gain across multiple stages to keep no single stage near compression. Each high-gain stage needs correspondingly high IIP3.
- Use variable gain amplifiers (VGAs) to handle the signal range: the AGC loop keeps the ADC input level constant regardless of received signal power.
- Don't forget the ADC itself: its ENOB and input full-scale power set the final SNR.
AGC and Automatic Gain Control
An AGC loop monitors the signal level (usually after the IF filter) and adjusts attenuators or VGAs to keep the ADC input at a constant level. Good AGC design requires: fast attack time (handles sudden strong signals before saturation), slow decay time (prevents noise pumping), and sufficient control range (> dynamic range of expected input signals).